Back to Editors' Blog

Synopsys’s IP Initiative

by Bryon Moyer

June 17, 2014 at 4:13 PM

IP used to refer to hardware designs that could be purchased off the shelf. Actually, at first they were designs that wouldn’t really work for any real application without a consulting contract to adapt them. But, over time, “shrink wrapped” became more viable. The idea was to save design time.

That idea still holds, but we’ve replaced one problem – design of individual blocks – with another: assembling all of the IP blocks into a complete system. And these IP blocks are more than your grampa’s simple fast Fourier transform; these are typically complete protocols that need to run a software stack.

Once assembled, the system will run the system software that’s being written for the SoC in parallel with the hardware design –software that’s separate from, and likely makes use of, the shrink-wrapped protocol libraries that may accompany the hardware IP.

So the full project development process involves hardware designers getting hardware running – first in prototypes, then in silicon. Meanwhile, software guys are coding away, using both virtual prototypes of the hardware and, eventually, the hardware prototypes that the hardware buys built.

In order to accommodate this more complex flow, Synopsys has announced their IP Initiative. It involves a more holistic view of how IP is integrated into SoCs, and the idea is to make the IP and accompanying elements work out of the box so no time is wasted on things that have already been completed – all of the effort can go into integration.

The image below shows the bigger picture of what they’re trying to accomplish. It includes both existing elements (like the hardware IP) and new elements being released as of the announcement, like the prototyping kits.

Figure.png

The IP prototyping kits are intended for hardware engineers, and they include a working reference design out-of-the-box on a HAPS board. IP licencees will have access to the accompanying IP RTL. Meanwhile, the IP software development kits include tools and virtual platform models of the IP that, again, work out-of-the-box.

The final bit, customized IP subsystems, gets to the challenges of putting all of these pieces together and coaxing them to work. Individual IP blocks work out of the box, but assembling them into an SoC isn’t trivial. Synopsys offers services to help create subsystems out of blocks.

You can read more about their offering in their announcement.

Channels

EDA.

 
    submit to reddit  



Comments:

You must be logged in to leave a reply. Login »

Related Articles

Constraining Light

Or, How the Heck Do I Design a Photonic Circuit?

by Bryon Moyer

Several weeks ago we took a look at the expanding role of EDA. And then a couple weeks ago we delved into the bizarre world...

First Responder Robots and Virtual Prototypes

Carbons New Virtual Prototype Portal and UDGs New Smart Robot

by Amelia Dalton

Whats the difference between a human and a pile of rocks? A robot algorithm (of course)! In this weeks episode of Fish Fry,...

Moores Law Meets the Trade Press

EE Journal Turns 11

by Kevin Morris

...

Expanding EDA

Newer Tools Let You Do More than Just Electronics

by Bryon Moyer

Welcome to autumn. Its usually a busy season although the activity typically starts more with the onset of September and the resumption of school...

Shifting Left

Designing Code, Breaking Code, and the Verification in Between

by Amelia Dalton

Like the venerable Kenny Rogers once said, You have to know when to hold em, know when to fold em In the verification game, much...

Related On Demand

Assertion-Based Emulation Using Veloce

Sponsored by Mentor Graphics

SoC Interconnect Verification

Sponsored by Cadence

The Vault - Tech Packet

Sponsored by Altium


Login Required

In order to view this resource, you must log in to our site. Please sign in now.

If you don't already have an acount with us, registering is free and quick. Register now.

Sign In    Register