by Bryon Moyer
May 04, 2012 at 11:34 AM
We’ve noted before that the meaning of “corners” is much less obvious for analog circuits than it is for digital. Solido noted in a recent announcement that memory design in particular highlights the challenge. Memories are built of analog circuits that are repeated numerous times, and getting them all to yield on aggressive processes with enormous variation is a tough job.
They say that the standard Monte Carlo “run enough samples to cover the space, and then interpolate the gaps” approach has become untenable because of the number of samples that must be taken – billions – to capture a process with enough fidelity to capture problem areas. You can go with fewer points to simulate, but you may interpolate or extrapolate incorrectly – drastically so in some cases. In particular, if you’re trying for a high-sigma design, it’s unlikely that you’ll adequately check out the tails of the process.
So Solido has announced an enhanced form of meta-simulation: it’s a way they have of analyzing the sample set to determine which points to simulate rather than simulating them all. They claim they can run a 5-billion-sample set in as little 15 minutes. They claim no loss of confidence in the result as compared to running all 5 billion simulations.
You can find more information and a link to some whitepapers in their release…