Braving the Black-and-White

ISSCC Highlights

by Bryon Moyer

You can’t figure out whether it’s a bad dream or just a dream. You’re gliding down an escalator towards a large, subterranean space. All you see is black and white, as if color has been banished from the building. Despite your misgivings, the escalator delivers you into the monochromatic morass. Shoulder-to-shoulder suits explain the chromatic deficit. Interactions are formal, even stilted. Snippets of banter range from the banal to the arcane. You question whether you could cast a cogent contribution into any of the conversations, whether you really belong here. You pinch yourself; you try to shake yourself awake. And you realize… it’s not a bad dream. It’s not a dream at all. It’s ISSCC, one of the least commercial of conferences for chip makers. You’re in a foyer full of engineers on a coffee break between sessions. Not a logo or company banner in sight. Marketing dudes not welcome. It’s about substance, not style. Go technical or go home.

 

Simplifying DDR

Mentor’s New DDR Wizard

by Bryon Moyer

Over in one of our sister pubs, we did a review of some of the challenges of DDR last year. In particular, DDR3 has some incredible timing subtleties that have to be managed. DDR controllers are available as IP for FPGAs, but they still have to be connected to the memories on the board. And those board connections can seriously affect whether or not the timing requirements of the DDR protocols are properly met.

Mentor has just announced new versions of their HyperLynx PI and SI board power integrity products, and the SI one has a briefly-mentioned little feature that I got to see in action at DesignCon; apparently they’re finding that this “oh and by the way” thing is much more than a trivial add-on. It’s a wizard that allows you to specify how you’ve configured your DDR controller and then check out whether the timing passes muster. It can handle DDR, DDR2, and DDR3. A lot of the popularity seems to be with FPGA applications (although it can be used with other controllers as well). Granted, this is a board design tool, but this is where board meets FPGA.

 

Free Linux Microprocessor*

(Some Restrictions Apply)

by Jim Turley

In keeping with our theme of free stuff (see Embedded Technology Journal, January 27, 2009) we proudly chronicle the newest free alternative for embedded developers: a free Linux-compatible microprocessor. Never has so much been offered to so many for so little. Or something like that.

Here’s the deal. Altera, the world’s second-best-known FPGA company, has struck a deal with Wind River Systems, the world’s second-best-known embedded-software company, to port Linux to Altera’s NIOS II processor. And since NIOS is free, you’ve got yourself a free 32-bit microprocessor capable of running a genuine full-on multitasking Linux operating system.

 

Free Linux Microprocessor*

(Some Restrictions Apply)

by Jim Turley

In keeping with our theme of free stuff (see Embedded Technology Journal, January 27, 2009) we proudly chronicle the newest free alternative for embedded developers: a free Linux-compatible microprocessor. Never has so much been offered to so many for so little. Or something like that.

Here’s the deal. Altera, the world’s second-best-known FPGA company, has struck a deal with Wind River Systems, the world’s second-best-known embedded-software company, to port Linux to Altera’s NIOS II processor. And since NIOS is free, you’ve got yourself a free 32-bit microprocessor capable of running a genuine full-on multitasking Linux operating system. Naturally, there’s a catch. In fact, there are two. First off, NIOS is free only if you’re already using Altera’s FPGA chips (more on this later). Second, the Linux itself isn’t free; Wind River charges a significant amount of money for access to the software, and even more money for annual support.

That’s right – the microprocessor is free but the open-source software costs money. One wonders how such a paradox came to be.

 

Evaluating a Design Data Management System

by Scott Woods, Integrated Device Technology, Inc.

Evaluating any EDA tool has several challenges. You have several tools and vendors to choose from. You have to get past the marketing hype to determine what is really important to you and whether the supported feature set meets your requirements. Finally, you have to make sure that the features you need perform as advertised. And, of course, you have to do this evaluation while juggling all your other tasks.

Evaluating a design data management (DDM) system is further complicated by the fact that it is groupware. To be effective, all the engineers on the project must adopt the system. Different sub-groups may use different tools and may have different requirements. The needs of the analog designers may be different than those of digital designers. The effectiveness of the DDM system is best judged in a real and interactive group environment, which is difficult to simulate during an evaluation cycle when only a few people are using the system in a test environment.

 

Acquiring More Addicts

Easing into Formal Verification

by Bryon Moyer

Last summer we took a look at the fact that formal verification is seeing something of a repositioning and resurgence. The holiest of holies is the ability to verify that all possible use cases of a piece of logic have been specified and that all possible outcomes of those use cases have been verified to operate as desired.

It can be viewed as a big jump from no formal verification to the complete set; it’s a change to the design flow, and we all know that the hardest thing to bring about is a methodology change. One of the players in this field, OneSpin Solutions, has brought some marketing magic to this problem in order to make formal more accessible to more designers. I’m sure they wouldn’t want to think of it this way, but they’ve realized that they need to apply a series of gateway drugs to get you hooked, rather than approaching you straight-off with a big-ol’ honkin’ scary-lookin’ needle. Of course, this would imply that formal verification is addictive but harmful and will ultimately be your undoing. As this isn’t the intent of the metaphor, perhaps we should think of it as Helpful Heroin.


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